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LTC3723-1/ltc3723-2 1 372312f , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. applicatio s u features typical applicatio u descriptio u the ltc ? 3723-1/ltc3723-2 synchronous push-pull pwm controllers provide all of the control and protection func- tions necessary for compact and highly efficient, isolated power converters. high integration minimizes external component count, while preserving design flexibility. the robust push-pull output stages switch at half the oscillator frequency. dead-time is independently pro- grammed with an external resistor. synchronous rectifier timing is adjustable to optimize efficiency. a uvlo pro- gram input provides precise system turn-on and turn off voltages. the LTC3723-1 features peak current mode control with programmable slope compensation and lead- ing edge blanking, while the ltc3723-2 employs voltage mode control with voltage feedforward capability. the LTC3723-1/ltc3723-2 feature extremely low operat- ing and start-up currents. both devices provide reliable short-circuit and overtemperature protection. the LTC3723-1/ltc3723-2 are offered in a 16-pin ssop package. telecommunications, infrastructure power systems distributed power architectures high efficiency synchronous push-pull pwm 1.5a sink, 1a source output drivers supports push-pull, full-bridge, half-bridge, and forward topologies adjustable push-pull dead-time and synchronous timing adjustable system undervoltage lockout and hysteresis adjustable leading edge blanking low start-up and quiescent currents current mode (LTC3723-1) or voltage mode (ltc3723-2) operation single resistor slope compensation v cc uvlo and 25ma shunt regulator programmable fixed frequency operation to 1mhz 50ma synchronous output drivers soft-start, cycle-by-cycle current limiting and hiccup mode short-circuit protection 5v, 15ma low dropout regulator available in 16-pin ssop package synchronous push-pull pwm controllers ? ? v out v out v + v out gnd-f lt1431 gnd-s coll r ref 372312 ta01 v in v ref from auxiliary winding v ref drva drvb cs v cc dprg LTC3723-1 sdra sdrb v ref comp uvlo sprg c t r leb ss fb gnd ltc3901 sync me mf isolated push-pull converter
LTC3723-1/ltc3723-2 2 372312f v cc to gnd (low impedance source) .......C 0.3v to 10v (chip self-regulates at 10.3v) uvlo to gnd ............................................. C 0.3v to v cc all other pins to gnd (low impedance source) .........................C 0.3v to 5.5v v cc (current fed) ................................................. 40ma absolute axi u rati gs w ww u package/order i for atio uu w (note 1) electrical characteristics the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 9.5v unless otherwise noted. v ref output current ............................... self-regulated operating temperature (notes 5,6) ltc3723e ........................................... C 40 c to 85 c storage temperature range ................. C 65 c to 125 c lead temperature (soldering, 10sec)................... 300 c t jmax = 125 c, ja = 100 c/w order part number gn part marking consult ltc marketing for parts specified with wider operating temperature ranges. ltc3723egn-1 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ 37231 1 2 3 4 5 6 7 8 top view gn package 16-lead plastic ssop 16 15 14 13 12 11 10 9 v ref sdrb sdra drvb v cc drva gnd c t sprg uvlo ss fb r leb comp cs dprg t jmax = 125 c, ja = 100 c/w order part number gn part marking ltc3723egn-2 37232 1 2 3 4 5 6 7 8 top view gn package 16-lead plastic ssop 16 15 14 13 12 11 10 9 v ref sdrb sdra drvb v cc drva gnd c t sprg uvlo ss fb dprg comp cs ramp symbol parameter conditions min typ max units input supply v ccuv v cc undervoltage lockout measured on v cc 10.25 10.7 v v cchy v cc uvlo hysteresis measured on v cc 3.8 4.2 v i ccst start-up current v cc = v uvlo C 0.3v 145 230 a i ccrn operating current no load on outputs 3 8 ma v shunt shunt regulator voltage current into v cc = 10ma 10.3 10.8 v r shunt shunt resistance current into v cc = 10ma to 17ma 1.4 3.5 ? suvlo system uvlo threshold measured on uvlo pin, 10ma into v cc 4.8 5.0 5.2 v shyst system uvlo hysteresis current current flows out of uvlo pin, 10ma into v cc 8.5 10 11.5 a pulse width modulator ros ramp offset voltage measured on comp, ramp = 0v 0.65 v i rmp ramp discharge current ramp = 1v, comp = 0v, c t = 4v, 3723-1 only 50 ma
LTC3723-1/ltc3723-2 3 372312f electrical characteristics the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 9.5v unless otherwise noted. symbol parameter conditions min typ max units i slp slope compensation current measured on cs, c t = 1v, 3723-1 only 30 a c t = 2.25v 68 a dcmax maximum duty cycle comp = 4.5v 47 48.2 50 % dcmin minimum duty cycle comp = 0v 0% dtadj dead-time 130 ns oscillator osci initial accuracy t a = 25 c, c t = 270pf 220 250 280 khz osct v cc variation v cc = 6.5v to 9.5v, overtemperature C3 3 % oscv c t ramp amplitude measured on c t 2.35 v error amplifier v fb fb input voltage comp = 2.5v, (note 3) 1.172 1.2 1.22 v fb i fb input range measured on fb, (note 4) C 0.3 2.5 v avol open-loop gain comp = 1v to 3v, (note 3) 70 90 db i ib input bias current comp = 2.5v, (note 3) 5 50 na v oh output high load on comp = C100 a 4.7 4.92 v v ol output low load on comp = 100 a 0.27 0.5 v i source output source current comp = 2.5v 400 700 a i sink output sink current comp = 2.5v 2 5 ma reference v ref initial accuracy t a = 25 c, measured on v ref 4.925 5.00 5.075 v refld load regulation load on v ref = 100 a to 5ma 2 15 mv refln line regulation v cc = 6.5v to 9.5v 1 10 mv reftv total variation line, load and temperature 4.900 5.000 5.100 v refsc short-circuit current v ref shorted to gnd 18 30 45 ma push-pull outputs drvh(x) output high voltage i out(x) = C100ma 9.0 9.2 v drvl(x) output low voltage i out(x) = 100ma 0.17 0.6 v rdh(x) pull-up resistance i out(x) = C10ma to C100ma 2.9 4 ? rdl(x) pull-down resistance i out(x) = C10ma to C100ma 1.7 2.5 ? tdr(x) rise-time c out(x) = 1nf 10 ns tdf(x) fall-time c out(x) = 1nf 10 ns synchronous outputs outh(x) output high voltage i out(x) = C30ma 9.0 9.2 v outl(x) output low voltage i out(x) = 30ma 0.44 0.6 v rhi(x) pull-up resistance i out(x) = C10ma to -30ma 11 15 ? rlo(x) pull-down resistance i out(x) = C10ma to -30ma 15 20 ? tr(x) rise-time c out(x) = 50pf 10 ns tf(x) fall-time c out(x) = 50pf 10 ns current limit and shutdown clpp pulse by pulse current limit threshold measured on cs 280 300 320 mv clsd shutdown current limit threshold measured on cs 475 600 725 mv cldel current limit delay to output 100mv overdrive on cs, (note 2) 80 ns
LTC3723-1/ltc3723-2 4 372312f v cc (v) 0 i cc ( a) 100 150 8 372312 g01 50 0 2 4 6 10 200 symbol parameter conditions min typ max units electrical characteristics the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 9.5v unless otherwise noted. start-up i cc vs v cc v cc vs i shunt oscillator frequency vs temperature typical perfor a ce characteristics uw i shunt (ma) 0 v cc (v) 10.00 10.25 40 372312 g02 9.75 9.50 10 20 30 50 10.50 temperature ( c) frequency (khz) 240 250 80 372312 g03 230 220 C40 C 60 C 20 20 0 40 60 100 260 c t = 270pf (t a = 25 c unless otherwise noted) leading edge blanking time vs r leb v ref vs i ref v ref vs temperature r leb (k ? ) 0 blank time (ns) 350 300 250 200 150 100 50 0 372312 g04 40 100 20 10 30 50 70 90 60 80 i ref (ma) 0 v ref (v) 5.05 5.00 4.95 4.90 4.85 4.80 15 25 40 372312 g05 510 20 30 35 t j = 25 c t j = 85 c t j = C40 c temperature ( c) v ref (v) 4.99 5.00 80 372312 g06 4.98 4.97 C40 C 60 C 20 20 0 40 60 100 5.01 note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: includes leading edge blanking delay, r leb = 20k, not tested in production. note 3: fb is driven by a servo loop amplifier to control v comp for these tests. note 4: set fb to C0.3v, 2.5v and insure that comp does not phase invert. note 5: the ltc3723eC1/ltc3723e-2 are guaranteed to meet performance specifications from 0 c to 70 c. specifications over the C40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 6: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125 c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. ssi soft-start current ss = 2.5v 10 13 16 a ssr soft-start reset threshold measured on ss 0.7 0.4 0.1 v flt fault reset threshold measured on ss 4.5 4.2 3.5 v
LTC3723-1/ltc3723-2 5 372312f frequency (hz) gain (db) phase (deg) C180 1m 372312 g07 C270 C360 10 1k 100 10k 100k 10m 100 80 60 40 20 0 temperature ( c) C55 i cc ( a) 190 180 170 160 150 140 130 120 110 100 372312 g08 C25 5 35 95 125 65 r dprg (k ? ) 0 50 delay (ns) 100 150 200 75 125 175 225 275 50 100 150 200 372312 g09 250 500 450 400 350 300 250 no 200k prebias 200k prebias r sprg (k ? ) 0 0 delay (ns) 400 500 700 600 900 100 150 372312 g12 300 200 100 800 250 300 50 200 temperature ( c) C55 current ( a) 90 80 70 60 50 40 30 20 10 0 372312 g10 C25 5 35 95 125 65 c t = 1v c t = 2.25v temperature ( c) C55 10.5 10.4 10.3 10.2 10.1 10.0 9.9 9.8 372312 g11 C25 5 35 95 125 65 shunt voltage (v) i cc = 10ma error amplifier gain/phase start-up i cc vs temperature typical perfor a ce characteristics uw ltc3723 deadtime vs r dprg with and without 200k prebias compensation (t a = 25 c unless otherwise noted) synchronous driver turn-off delay vs r sprg referenced to ct peak slope current vs temperature v cc shunt voltage vs temperature fb input voltage vs temperature temperature ( c) C55 fb voltage (v) 1.205 1.204 1.203 1.202 1.201 1.200 1.199 1.198 1.197 372312 g13 C25 5 35 95 125 65 synchronous driver turn-off delay vs r sprg referenced to push-pull driver outputs r sprg (k ? ) 0 200 250 350 100 372312 g14 150 100 50 200 150 250 300 50 C50 0 300 delay (ns) r dprg = 150k
LTC3723-1/ltc3723-2 6 372312f v ref (pin 1/pin 1): output of the 5.0v reference. v ref is capable of supplying up to 18ma to external circuitry. v ref should be decoupled to gnd with a 0.47 f ceramic capacitor. sdrb (pin 2/pin 2): 50ma driver for synchronous recti- fier associated with drvb. sdra (pin 3/pin 3): 50ma driver for synchronous recti- fier associated with drva. drvb (pin 4/pin 4): high speed 1.5a sink, 1a source totem pole mosfet driver. connect to gate of external push-pull mosfet with as short a pcb trace as practical to preserve drive signal integrity. a low value resistor connected between drva and the mosfet gate is op- tional and will improve the gate drive signal quality if the pcb trace from the driver to the mosfet cannot be made short. v cc (pin 5/pin 5): supply voltage input to the LTC3723-1/ ltc3723-2 and 10.25v shunt regulator. the chip is enabled after v cc has risen high enough to allow the v cc shunt regulator to conduct current and the uvlo com- parator threshold is exceeded. once the v cc shunt regu- lator has turned on, v cc can drop to as low as 6v (typical) and maintain operation. bypass v cc to gnd with a high quality 1 f or larger ceramic capacitor to supply the transient currents caused by the high speed switching and capacitive loads presented by the on chip totem pole drivers. drva (pin 6/pin 6): high speed 1.5a sink, 1a source totem pole mosfet driver. connect to gate of external push-pull mosfet with as short a pcb trace as practical to preserve drive signal integrity. a low value resistor connected between drva and the mosfet gate is op- tional and will improve the gate drive signal quality if the pcb trace from the driver to the mosfet cannot be made short. gnd (pin 7/pin 7): all circuits in the ltc3723 are refer- enced to gnd. use of a ground plane is highly recom- descriptio s u pi u (LTC3723-1/ltc3723-2) mended. v in and v ref bypass capacitors must be termi- nated with a star configuration as close to gnd as practical for best performance. c t (pin 8/pin 8): timing capacitor for the oscillator. use a 5% or better low esr ceramic capacitor for best results. c t ramp amplitude is 2.35v peak-to-peak (typical). dprg (pin 9/pin 12): programming input for push-pull dead-time. connect a resistor between dprg and v ref to program the dead-time. the nominal voltage on dprg is 2v. ramp (n/a/pin 9): input to pwm comparator for ltc3723-2 only (voltage mode controller). the voltage on ramp is internally level shifted by 650mv. cs (pin 10/pin 10): input to pulse-by-pulse and overload current limit comparators, output of slope compensa- tion circuitry. the pulse-by-pulse comparator has a nomi- nal 300mv threshold, while the overload comparator has a nominal 600mv threshold. an internal switch discharges cs to gnd after every timing period. slope compensation current flows out of cs during the pwm period. an external resistor connected from cs to the external current sense resistor programs the amount of slope compensation. comp (pin 11/pin 11): error amplifier output, inverting input to phase modulator. r leb (pin 12/n/a): timing resistor for leading edge blanking. use a 10k to 100k resistor connected between r leb and gnd to program from 40ns to 310ns of leading edge blanking of the current sense signal on cs for the LTC3723-1. a 1% tolerance resistor is recommended. the ltc3723-2 has a fixed blanking time of approximately 80ns. the nominal voltage on r leb is 2v. if leading edge blanking is not required, tie r leb to v ref to disable. fb (pin 13/pin 13): error amplifier inverting input. this is the voltage feedback input for the ltc3723. the nominal regulation voltage at fb is 1.2v.
LTC3723-1/ltc3723-2 7 372312f programmable dead-time programmable synchronous turn-off delay drva drvb sdra sdrb 372312 td01 current sense or c t ramp pwm comparator (C) ti i g diagra w u w descriptio s u pi u (LTC3723-1/ltc3723-2) ss (pin 14/pin 14): soft-start/restart delay circuitry timing capacitor. a capacitor from ss to gnd provides a controlled ramp of the current command (LTC3723-1) or duty cycle (ltc3723-2). during overload conditions, ss is discharged to ground initiating a soft-start cycle. ss charging current is approximately 13 a. ss will charge up to approximately 5v in normal operation. during a con- stant overload current fault, ss will oscillate at a low frequency between approximately 0.5v and 4v. uvlo (pin 15/pin 15): input to program system turn-on and turn-off voltages. the nominal threshold of the uvlo comparator is 5.0v. uvlo is connected to the main dc system feed through a resistor divider. when the uvlo threshold is exceeded, the LTC3723-1/ltc3723-2 com- mences a soft-start cycle and a 10 a (nominal) current is fed out of uvlo to program the desired amount of system hysteresis. the hysteresis level can be adjusted by chang- ing the resistance of the divider. uvlo can also be used to terminate all switching by pulling uvlo down to less than 4v. an open drain or collector switch can perform this function without changing the system turn on or turn off voltages. sprg (pin 16/pin 16): a resistor is connected between sprg and gnd to set the turn off delay for the synchro- nous rectifier driver outputs. the nominal voltage on sprg is 2v.
LTC3723-1/ltc3723-2 8 372312f block diagra s w rq s q t 1.5a sink 1a source drva q r q s 6 drvb 4 1.5a sink 1a source sdrb 2 sdra 3 sync rectifier drive logic fault logic oscillator slope compensator pulse-by-pulse current limit 300mv 372312 bd01 sprg 16 c t 8 dprg 9 C + pulse width modulator error amplifier + C shutdown current limit v ref 13 a 50k 14.9k 600mv C + C + blank r leb 12 7 cs 10 ss 14 comp 1.2v 11 fb 13 + C system uvlo v cc v cc good 10 a 5v C + + C 650mv uvlo 15 ref, ldo 1.2v 5v ref good v ref 1 v cc uvlo 10.25v on 6v off v cc 5 gnd LTC3723-1 block diagram
LTC3723-1/ltc3723-2 9 372312f rq s q t 1.5a sink 1a source drva q r q s 6 drvb 4 1.5a sink 1a source sdrb 2 sdra 3 sync rectifier drive logic output drive logic fault logic oscillator pulse-by-pulse current limit 300mv 372312 bd02 sprg 16 dprg 9 c t 8 C + pulse width modulator error amplifier + C shutdown current limit v ref 13 a 50k 600mv C + blank 7 cs 10 ss 14 comp 1.2v 11 fb 13 + C system uvlo v cc v cc good 10 a 5v C + + C 650mv uvlo 15 ref, ldo 1.2v 5v ref good v ref 1 v cc uvlo 10.25v on 6v off v cc 5 gnd ramp 9 C + block diagra s w ltc3723-2 block diagram
LTC3723-1/ltc3723-2 10 372312f C + turn-on output 2.5v + C v 2v 10 a v ref dprg r dprg 372312 f01 200k optional please refer to the detailed block diagrams for this discus- sion. the LTC3723-1 and ltc3723-2 are synchronous pwm push-pull controllers. the LTC3723-1 operates with peak pulse-by-pulse current mode control while the ltc3723-2 offers voltage mode control operation. they are best suited for moderate to high power isolated power systems where small size and high efficiency are required. the push-pull topology delivers excellent transformer utilization and requires only two low side power mosfet switches. both controllers generate 180 out of phase 0% to < 50% duty cycle drive signals on drva and drvb. the external mosfets are driven directly by these power- ful on-chip drivers. the external mosfets typically con- trol opposite primary windings of a centertapped power transformer. the centertap primary winding is connected to the input dc feed. the secondary of the transformer can be configured in different synchronous or nonsynchronous configurations depending on the application needs. the duty ratio is controlled by the voltage on comp. a switching cycle commences with the falling edge of the internal oscillator clock pulse. the LTC3723-1 attenuates the voltage on comp and compares it to the current sense signal to terminate the switching cycle. the ltc3723-2 compares the voltage on comp to a timing ramp to terminate the cycle. the ltc3723-2s c t waveform can be used for this purpose or separate r-c components can be connected to ramp to generate the timing ramp. if the voltage on cs exceeds 300mv, the present cycle is termi- nated. if the voltage on cs exceeds 600mv, all switching stops and a soft-start sequence is initiated. the LTC3723-1 / ltc3723-2 also provide drive signals for secondary side synchronous rectifier mosfets. synchro- nous rectification improves converter efficiency, espe- cially as the output voltages drop. independent turn-off control of the synchronous rectifiers is provided via sprg in order to optimize the benefit of the synchronous recti- fiers. a resistor from sprg to gnd sets the desired turn off delay. a host of other features including an error amplifier, system uvlo programming, adjustable leading edge blank- ing, slope compensation and programmable dead-time provide flexibility for a variety of applications. operatio u programming driver dead-time the LTC3723-1/ltc3723-2 controllers include a feature to program the minimum time between the output signals on drva and drvb commonly referred to as the driver dead-time. this function will come into play if the control- ler is commanded for maximum duty cycle. the dead-time is set with an external resistor connected between dprg and v ref (see figure 1). the nominal regulated voltage on dprg is 2v. the external resistor programs a current which flows into dprg. the dead-time can be adjusted from 90ns to 300ns with this resistor. the dead-time can also be modulated based on an external current source that feeds current into dprg. care must be taken to limit the current fed into dprg to 350 a or less. an internal 10 a current source sets a maximum deadtime if dprg is floated. the internal current source causes the programmed deadtime to vary non-linearly with increasing values of rdprg (see typical performance characteristics). an ex- ternal 200k resistor connected from dprg to gnd will compensate for the internal 10 a current source and linearize the deadtime delay vs rdprg characteristic. powering the LTC3723-1/ltc3723-2 the LTC3723-1/ltc3723-2 utilize an integrated v cc shunt regulator to serve the dual purposes of limiting the voltage applied to v cc as well as signaling that the chips bias voltage is sufficient to begin switching operation (under voltage lockout). with its typical 10.2v turn-on voltage and 4.2v uvlo hysteresis, the LTC3723-1/ltc3723-2 is tolerant of loosely regulated input sources such as an auxiliary transformer winding. the v cc shunt is capable of sinking up to 40ma of externally applied current. the uvlo turn-on and turn-off thresholds are derived from an internally trimmed reference making them extremely ac- curate. in addition, the LTC3723-1/ltc3723-2 exhibits figure 1. delay timeout circuitry
LTC3723-1/ltc3723-2 11 372312f very low (145 a typ) start-up current that allows the use of 1/8w to 1/4w trickle charge start-up resistors. the trickle charge resistor should be selected as follows: r start(max) = v in(min) C 10.7v/250 a adding a small safety margin and choosing standard values yields: application v in range r start dc/dc 36v to 72v 100k off-line 85v to 270v rms 430k pfc preregulator 390v dc 1.4m v cc should be bypassed with a 0.1 f to 1 f multilayer ceramic capacitor to decouple the fast transient currents demanded by the output drivers and a bulk tantalum or electrolytic capacitor to hold up the v cc supply before the bootstrap winding, or an auxiliary regulator circuit takes over. c holdup = (i cc + i drive ) ? t delay /3.8v (minimum uvlo hysteresis) regulated bias supplies as low as 7v can be utilized to provide bias to the LTC3723-1/ltc3723-2. refer to figure 2 for various bias supply configurations. figure 2. bias configurations 372312 f02 12v 10% 1.5k v cc v in v cc c hold 1n5226 3v 1 f 1 f v bias < v uvlo r start 1n914 + figure 3. system uvlo setup on off r bottom r top uvlo 372312 f03 operatio u uvlo. the amount of dc feed hysteresis provided by this current is: 10 a ? r top , (figure 3). the system uvlo threshold is: 5v ? {(r top + r bottom )/r bottom }. if the voltage applied to uvlo is present and greater than 5v prior to the v cc uvlo circuitry activation, then the internal uvlo logic will prevent output switching until the follow- ing three conditions are met: (1) v cc uvlo is enabled, (2) v ref is in regulation and (3) uvlo pin is greater than 5v. uvlo can also be used to enable and disable the power converter. an open drain transistor connected to uvlo as shown in figure 3 provides this capability. programming undervoltage lockout the LTC3723-1/ltc3723-2 provides undervoltage lock- out (uvlo) control for the input dc voltage feed to the power converter in addition to the v cc uvlo function described in the preceding section. input dc feed uvlo is provided with the uvlo pin. a comparator on uvlo compares a divided down input dc feed voltage to the 5v precision reference. when the 5v level is exceeded on uvlo, the ss pin is released and output switching com- mences. at the same time a 10 a current is enabled which flows out of uvlo into the voltage divider connected to off-line bias supply generation if a regulated bias supply is not available to provide v cc voltage to the LTC3723-1/ltc3723-2 and supporting circuitry, one must be generated. since the power require- ment is small, approximately 1w, and the regulation is not critical, a simple open-loop method is usually the easiest and lowest cost approach. one method that works well is to add a winding to the main power transformer, and post regulate the resultant square wave with an l-c filter (see figure 4a). the advantage of this approach is that it maintains decent regulation as the supply voltage varies, and it does not require full safety isolation from the input winding of the transformer. some manufacturers include a primary winding for this purpose in their standard figure 4a. auxiliary winding bias supply 372312 f04a + v cc v in c hold 1 f r start 2k 15v* *optional
LTC3723-1/ltc3723-2 12 372312f operatio u product offerings as well. a different approach is to add a winding to the output inductor and peak detect and filter the square wave signal (see figure 4b). the polarity of this winding is designed so that the positive voltage square wave is produced while the output inductor is freewheel- ing. an advantage of this technique over the previous is that it does not require a separate filter inductor and since the voltage is derived from the well-regulated output voltage, it is also well controlled. one disadvantage is that this winding will require the same safety isolation that is required for the main transformer. another disadvantage is that a much larger v cc filter capacitor is needed, since it does not generate a voltage as the output is first starting up, or during short-circuit conditions. figure 4b. output inductor bias supply 372312 f04b v cc v out v in c hold r start + 1 f l out iso barrier programming the LTC3723-1/ltc3723-2 oscillator the high accuracy LTC3723-1/ltc3723-2 oscillator cir- cuit provides flexibility to program the switching fre- quency and slope compensation required for current mode control (LTC3723-1). the oscillator circuit pro- duces a 2.35v peak-to-peak amplitude ramp waveform on c t . typical maximum duty cycles of 49% are possible. the oscillator is capable of operation up to 1mhz by the following equation: c t = 1/(14.8k ? f osc ) note that this is the frequency seen on c t . the output drivers switch at 1/2 of this frequency. also note that higher switching frequency and added driver dead-time via dprg will reduce the maximum duty cycle. the LTC3723-1/ltc3723-2 can be synchronized to an external frequency source such as another pwm chip. in single-ended operation in addition to push-pull and full-bridge topologies, single- ended topologies such as the forward and flyback con- verter can benefit from the many advanced features of the ltc3723. in figure 6, the ltc3723 is used with the ltc4440, 100v high side driver to implement a two- transistor forward converter. drvb is used which limits the converters maximum duty cycle to 50% (less pro- grammable driver dead time). ltc3723 c t f osc < f ext < 1.25 ? f osc f sw = f osc /2 f osc ? 68pf c t 372312 f05 390 ? bat54 210 a 2.56v ? c t external frequency source figure 5. synchronization from external source figure 6. two-transistor forward converter (duty cycle < 50%) 210 a 2 ? 2.56v ? c t ltc3723 drvb c t gnd c t in to synchronous secondary mosfet ts ltc4440 372312 f06 gnd tg ? sdrb v in f sw ? Cv in figure 5, the leading edge of an external pulse is used to terminate the natural clock cycle. if the external frequency is higher than the oscillator frequency, the internal oscil- lator will synchronize with the external input frequency.
LTC3723-1/ltc3723-2 13 372312f the 50% duty-cycle limit is overcome with the circuit shown in figure 7. operation is similar to external syn- chronization, except drva output is used to terminate its own clock cycle early. switching period is now equal to the oscillator period plus programmable driver dead time. maximum on time is equal to oscillator period minus driver dead time. although near 100% duty cycle operation may be of benefit with non-isolated converters, it is often desirable to limit the duty cycle of single-ended isolated converters. instead of immediately ending the unused clocks output, figure 8 uses a transistor to switch in additional timing capacitor charge current. this allows one to preset the maximum duty. voltage mode with ltc3723-2 figure 9 shows how basic connections differ between current mode LTC3723-1 and voltage mode ltc3723-2. oscillator may be used as the ramp input or the ltc3723- 2 includes an internal 10ma ramp discharge useful when implementing voltage feedforward. open loop control in which the duty cycle varies inversely proportional to input voltage is shown in figure 10. operatio u LTC3723-1 drva c t 68pf c t 372312 f07 drvb 390 ? bat54 f vc a t dprg df vc a t dprg sw t max sw t ? + ? ? ? ? ? ? ? ? ? ? ? ? ? 1 256 210 256 210 .? .? C figure 7. LTC3723-1 > 50% duty cycle LTC3723-1 drvb c t c t to synchronous secondary mosfet 372312 f08 ? sdrb drva v ref Cv in v in 50k r mmbt2369 f vc aar df vc a t dprg sw t max sw t ? + + () ? ? ? ? ? ? ? ? ? ? ? ? ? 1 256 1 210 1 210 3 256 210 .? / .? C figure 8. LTC3723-1 one-switch forward or flyback converter (maximum duty cycle 50% to 100%) figure 9. LTC3723-1 current mode and ltc3723-2 voltage mode connections figure 10. ltc3723-2 open loop control (duty cycle is inversely proportional to input voltage) 9 811 13 372312 f10 c t to input voltage ltc3723-2 ramp c t fb comp r dprg 9 812 1 372312 f09 c t to input voltage ltc3723-2 ramp c t dprg v ref r dprg 12 81 9 c t r leb LTC3723-1 rleb c t v ref dprg r dprg 8 912 1 c t ltc3723-2 c t ramp dprg v ref
LTC3723-1/ltc3723-2 14 372312f operatio u the LTC3723-1 derives a compensating slope current from the oscillator ramp waveform and sources this current out of cs. this function is disabled in the ltc3723-2. the desired level of slope compensation is selected with an external resistor connected between cs and the external current sense resistor, (figure 11). current sensing and overcurrent protection current sensing provides feedback for the current mode control loop and protection from overload conditions. the LTC3723-1/ltc3723-2 are compatible with either resis- tive sensing or current transformer methods. internally connected to the LTC3723-1/ltc3723-2 cs pin are two comparators that provide pulse-by-pulse and overcurrent shutdown functions respectively, (figure 12). the pulse-by-pulse comparator has a 300mv nominal threshold. if the 300mv threshold is exceeded, the pwm cycle is terminated. the overcurrent comparator is set approximately 2x higher than the pulse-by-pulse level. if the current signal exceeds this level, the pwm cycle is terminated, the soft-start capacitor is quickly discharged and a soft-start cycle is initiated. if the overcurrent condi- tion persists, the LTC3723-1/ltc3723-2 halts pwm op- eration and waits for the soft-start capacitor to charge up to approximately 4v before a retry is allowed. the soft- start capacitor is charged by an internal 13 a current source. if the fault condition has not cleared when soft- start reaches 4v, the soft-start pin is again discharged and a new cycle is initiated. this is referred to as hiccup mode operation. in normal operation and under most abnormal conditions, the pulse-by-pulse comparator is fast enough to prevent hiccup mode operation. in severe cases, how- ever, with high input voltage, very low r ds(on) mosfets and a shorted output, or with saturating magnetics, the overcurrent comparator provides a means of protecting the power converter. leading edge blanking the LTC3723-1/ltc3723-2 provides programmable lead- ing edge blanking to prevent nuisance tripping of the current sense circuitry. leading edge blanking relieves the filtering requirements for the cs pin, greatly improving the response to real overcurrent conditions. it also allows the use of a ground referenced current sense resistor or transformer(s), further simplifying the design. with a single 10k to 100k resistor from r leb to gnd, blanking times of approximately 40ns to 320ns are programmed. if not required, connecting r leb to v ref can disable leading edge blanking. keep in mind that the use of leading edge blanking will slightly reduce the linear control range for the pulse width modulator. figure 12. current sense/fault circuitry detail + C + C overload current limit 300mv 600mv uvlo enable uvlo enable r sq r sq q q s q pwm logic h = shutdown outputs cs r cs + C + C c ss ss 0.4v 4.1v 372312 f12 pulse by pulse current limit pwm latch pwm 13 a figure 11. slope compensation circuitry switch current current sense waveform v(c t ) 33k i = cs c t 33k added slope r slope r cs 372312 f11 ltc3723
LTC3723-1/ltc3723-2 15 372312f operatio u high current drivers the LTC3723-1/ltc3723-2 high current, high speed driv- ers provide direct drive of external power n-channel mosfet switches. the drivers swing from rail to rail. due to the high pulsed current nature of these drivers (1.5a sink, 1a source), care must be taken with the board layout to obtain advertised performance. bypass v cc with a 1 f minimum, low esr, esl ceramic capacitor. connect this capacitor with minimal length pcb leads to both v cc and gnd. a ground plane is highly recommended. the driver output pins (drva, drvb) connect to the gates of the external mosfet switches. the pcb traces making these connections should also be as short as possible to mini- mize overshoot and undershoot of the drive signal. synchronous rectification the LTC3723-1/ltc3723-2 produces the precise timing signals necessary to control secondary side synchronous rectifier mosfets on sdra and sdrb. synchronous rectifiers are used in place of schottky or silicon diodes on the secondary side to improve converter efficiency. as mosfet r ds(on) levels continue to drop, significant effi- ciency improvements can be realized with synchronous rectification, provided that the mosfet switch timing is optimized. synchronous rectification also provides bipo- lar output current capability, that is, the ability to sink as well as source current. programming the synchronous rectifier turn-off delay the LTC3723-1/ltc3723-2 controllers include a feature to program the turn-off edge of the secondary side syn- chronous rectifier mosfets relative to the beginning of a new primary side power delivery pulse. this feature pro- vides optimized timing for the synchronous mosfets which improves efficiency. at higher load currents it becomes more advantageous to delay the turn-off of the synchronous rectifiers until the beginning of the new power pulse. this allows for secondary freewheeling current to flow through the synchronous mosfet channel instead of its body diode. the turn-off delay is programmed with a resistor from sprg to gnd, (figure 13). the nominal regulated voltage on sprg is 2v. the external resistor programs a current which flows out of sprg. the delay can be adjusted from approximately 20ns to 200ns, with resistor values of 10k to 200k. do not leave sprg floating. the amount of delay can also be modulated based on an external current source that sinks current out of sprg. care must be taken to limit the current out of sprg to 350 a or less. C + turn-off sync out 372312 f13 + C v 2v sprg r sprg figure 13. synchronous delay circuitry
LTC3723-1/ltc3723-2 16 372312f l6 0.65 h 1 f v out v e v f Cv out Cv out 8.5v 100 ? c4 3.3 f 50v 390pf 1 f 100 ? 2k 1/4w q1 d6 9.1v c1, c2, c3 470 f 6.3v 3 si7892dp 3 si7892dp 3 1 8 49 11 v f v f 5 372312 ta02 v out Cv out d1 470 ? 1w d2 100k 1k t2 1(1.5mh):0.5 t1 9t(150 h):9t:7t:1t:1t ?? 0.1 f 330pf c6 2.2nf 250v + c5 68 f 20v + 12 11 8 7 10 9 2 4 5 6 3 1 22 ? 360 ? l4 1mh d4 d5 Cv out v out 330 ? 47 ? 0.68 f d7 1 f, 100v tdk c3225x7r2a105m c1-c3: sanyo 6tpb470m c4: tdk c3225x7r1h335m c5: avx tpse686m020r0150 c6: murata de2e3kh222mb3b d1, d2: diodes inc. es1a d4, d5: bas21 d6: mmbd5239b d7: bat54 l4: coilcraft do1608c-105 l5: vishay ihlp-2525cz-01 l6: pulse pa1294.650 q1: fzt690b q2: fmmt3904 r1, r2: irc lrc-lr2512-01-r060-g t1: efd25 transpower tti8696 t2: pulse pa0785 q2 si7450dp si7450dp 80 ? 1w 100pf 200v 80 ? 1w 100pf 200v 470 ? r1 0.06 ? 1.5w r2 0.06 ? 1.5w l5 1 h 1 f 100v 3 1 f 100v v in v in Cv in 3 42 610 6 5 18 1 9 14 13 7 12 16 8 3 11 5 15 6 5 1 2 v out 10v 8.5v 787 ? 100 ? 220pf 4.99k 1/4w 270 ? 2.49k 0.022 f 47nf Cv out gnd-f v + gnd-s coll ref lt1431cs8 sync pv cc csf + ltc3901egn moc207 ltc3723egn-1 v ref dprg ss fb gnd r leb sprg c t drvb sdrb sdra comp v cc uvlo drva cs 820 ? 150k 30k 5v 33k 10k 0.47 f 68nf 220pf 1 f 100 ? 1/4w 10v 66.5k v in 5v 383k 75k 12 4.99k csf C 14 8 4 10 13 mf 15 mf 6 v e 4.99k 1/4w cse + 5 4.99k 40.2k cse C gnd pgnd gnd pgnd 7 timer 2 me 316 1 me v cc 1 f ? ? ? ? ? 165w, 36v to 72v to 3.3v at 50a isolated push-pull converter typical applicatio s u
LTC3723-1/ltc3723-2 17 372312f typical applicatio s u 5 4 6 a a 10v v in 15 9 174k 1 0.47 f 1 f v ref c t 220pf 10nf t2 t1 efd20 1.13k 21.5k 1.5k 813 si7456dp l4 1mh 68 f 20v ? ? 10 8 18 5 4 16 10k 33k 100 ? 1/4w 66.5k 12 7 14 560 ? 383k 30k sync timer ltc3900es8 6 7 1nf 0.47 f 372312 ta03 v out + d1 4.3v v out fg gnd v cc 5 909 ? 26.1k cs + cs + cs + fg fg cg v out v out cs C 12 cg 34 si7456dp l1 4.7 h 5 2 3 10v bas21 bas21 ? 1 4 ? ? 6 + si7450dp 1 f 100v 2 v in v in Cv in 1.5nf 200v 1 f 100v 47 f 16v 2 + 1.5nf 10 f 25v 10k 0.1 f 0.1 f 220pf 6 2 2.2nf 250v 220pf 11 5 1 2 5 6 moc207 1 2 4 v in gnd 3 oc comp opto fb lt4430es6 1.00k 0.03 ? 1w 158k 1.78k 120pf l2 15 h 30 85 efficiency (%) 87 89 91 93 95 40 50 60 output power (w) 70 80 48v in 24 ? 1/4w 12 ? 1/2w si7456dp Cv out si7456dp 7 8 47 f 16v 2 + 220pf 220pf l3 33 h 24 ? 1/4w 12 ? 1/4w v ref cg c t ? 2.7k 2.7k mmbd914 mmbd914 8.66k mmbt2369 50k 1 f, 100v tdk c3225x7r2a105m (1210) 10 f, 25v tdk c4532x5r1e106m 47 f, 16v sanyo 16tqc47m d1: mmbz5229b l1: coilcraft do1813p-561hc l2: tdk slf12575t-150m4r7 l3: tdk slf10145t-330m1r6 l4: coilcraft do1608c-105 t1: pulse pa1040 t2: pulse pa0785 (1:0.5t) ltc3723egn-1 drvb cs comp sdrb v cc uvlo drva dprg v ref sprg gnd ss fb c t rleb 750 ? 22nf v ref v ref 680pf 22nf 15nf 470pf 4.7nf 1k LTC3723-1 36v in to 72v in to 12v/5a and ?2v/1.6a forward converter
LTC3723-1/ltc3723-2 18 372312f typical applicatio s u 5 4 6 a b 12v v in 15 ltc3723egn-1 drvb sdrb sdra comp cs v cc uvlo 9 150k 1 0.47 f 1 f drva dprg v ref sprg gnd ss fb c t 330pf 22nf 100k d8 10v 68nf 270pf t2 1(1.5mh):0.5 t1 4t:6t(65 hmin):6t:2t:2t 243k 2.49k 9.53k 10k 750 ? 1k 100 ? 1/4w 8 13 3 si7370dp 2 l4 1mh c3 68 f 20v v f d2 ? ? 3 2 8 19 5 4 16 10k 33k 200 ? 1/4w r1 0.03 ? 1.5w 66.5k rleb 12 7 14 220pf 22nf 100 ? 665 ? 1k 866 ? 6.19k 1/4w 1.5nf 464k 30k 1/4w sync pv cc csf + v f ltc3901egn csf C 8 11 12 1 41013 7 22nf 1 f 4.7 f 372312 ta04 Cv out v out Cv out d7 10v v out mf mf2 gnd pgnd gnd2 pgnd2 timer v cc 470pf 14 15 1k 866 ? 42.2k 1k 100 ? 6.19k 1/4w cse + v e Cv out v out v f v out 12v/20a Cv out cse C 65 me me2 23 16 si7370dp 2 si7852dp si7852dp l5 0.56 h 11 2 4 12v d5 d6 3 5 1 6 ? ? ? ? ? 9 7 v e + 0.1 f si7852dp 1 6 5 4 b 2 a d3 ltc4440es6 boost inp tg ts gnd v cc 12v 3 0.1 f si7852dp 1 6 5 4 2 b d4 ltc4440es6 boost inp tg ts gnd v cc 12v 1 f 100v 3 v in v in Cv in 42v to 56v 1 f 100v c1, c2 47 f 16v 2 + 1 f 1 f 100v 1k 1/4w 1 f, 100v tdk c3225x7r2a105m c1,c2: sanyo 16tqc47m c3: avx tpse686m020r0150 c4: murata ghm3045x7r222k-gc d2: diodes inc. es1b d3-d6: bas21 d7, d8: mmbz5240b l4: coilcraft do1608c-105 l5: coilcraft do1813p-561hc l6: pulse pa1294.132 or panasonic etqp1h1r0bfa r1, r2: irc lrc2512-r03g t1: pulse pa0805.004 t2: pulse pa0785 6 10 i sns i sns 0.1 f 11 5 1 2 1 moc207 c4 2.2nf 250v 0.1 f 3 6 5 8 gnd-f v + gnd-s coll ref lt1431cs8 a 1.5k 22 ? 4.7 ? 4.7 ? r2 0.03 ? 1.5w v e 470pf 100v l6 1.25 h 10 ? 1w 6 93 efficiency (%) 94 95 96 97 81012 load current (a) 14 16 18 20 42v in 48v in 56v in mmbt3904 ? LTC3723-1 240w 42v in to 56v in to 12v/20a isolated 1/4brick (2.3" 1.45")
LTC3723-1/ltc3723-2 19 372312f package descriptio u gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 C .244 (5.817 C 6.198) .150 C .157** (3.810 C 3.988) 16 15 14 13 .189 C .196* (4.801 C 4.978) 12 11 10 9 .016 C .050 (0.406 C 1.270) .015 .004 (0.38 0.10) 45 0 C 8 typ .007 C .0098 (0.178 C 0.249) .0532 C .0688 (1.35 C 1.75) .008 C .012 (0.203 C 0.305) typ .004 C .0098 (0.102 C 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 C .165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale 5 4 6 a b 12v v in 15 ltc3723egn-1 drvb sdrb sdra comp cs v cc uvlo 9 150k 1 0.47 f 1 f drva dprg v ref sprg gnd ss fb c t 330pf 68nf 270pf t2 t1 29.46mm 25.4mm 10.2mm planar 24.9k 8 13 3 hat2169 2 l3 1mh 68 f 20v v f ? ? 3 2 8 19 5 4 16 10k 33k 100 ? 1/4w r1 0.015 ? 1.5w 66.5k rleb 12 7 14 220pf 100 ? 2.67k 2.67k 1.27k 4.53k 100pf 464k 30k 1/4w sync pv cc csf + v f ltc3901egn csf C 8 11 12 1 410137 1 f 4.7 f 372312 ta05 Cv out d1 10v +v out mf mf2 gnd pgnd gnd2 pgnd2 timer v cc 470pf 14 15 1.27k 33.2k 1k 4.53k cse + v e Cv out +v out +v out Cv out v f +v out Cv out cse C 65 me me2 23 16 hat2169 2 l1 0.56 h 11 2 4 12v bas21 es1b es1b bas21 3 5 1 6 ? ? ? ? ? 9 7 v e + 0.1 f si7370dp 1 6 5 4 b 2 a bas21 ltc4440es6 boost inp tg ts gnd v cc 12v 3 0.1 f si7370dp si7370dp si7370dp 1 6 5 4 2 b bas21 ltc4440es6 boost inp tg ts gnd v cc 12v 1 f 100v 3 v in v in Cv in 1 f 100v 22 f 25v 3 1 f, 100v tdk c3225x7r2a105m 4.7 f, 25v tdk c4532x7r1e475m 22 f, 25v tdk c4532x7r1e226m d1: mmbz5240b d2: mmbz5242b l1: coilcraft do1813p-561hc l2: pulse pa0513.441 l3: coilcraft do1608c-105 t1: pulse pa0901.004 (4:4:4:4ct) t2: pulse pa0785 (1:0.5t) 10 i sns i sns 0.1 f 4.7 f 25v 2x 11 a 100 ? 22 ? 4.7 ? 4.7 ? 2.2nf 250v v e 1nf 100v 0.33 f 100v l2 0.44 h 10 ? 1w 5 7 8 9 output voltage (v) 10 11 12 13 10 15 load current (a) 25 20 42v in 48v in 53v in mmbt3904 ? d2 12v mmbt3904 1.2k 0.5w 5 91 92 93 efficiency (%) 94 95 96 97 10 15 load current (a) 25 20 42v in 48v in 53v in 5.1 ? 1/4w typical applicatio s u LTC3723-1 300w 42v in to 56v in to 12v/25a isolated bus converter
LTC3723-1/ltc3723-2 20 372312f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2003 lt 1105 ? printed in usa related parts part number description comments lt ? 1952 single switch synchronous forward controller high efficiency, adjustable volt-second clamp, true pwm soft-start ltc3705/ltc3706/ isolated power supply dc/dc converter chipset simple as buck circuit, no opto-coupler, fast transient response, ltc3725/ltc3726/ polyphase ? operation capability, scalable for higher power ltc3722-1/ltc3722-2 dual mode phase modulated full-bridge controllers zvs full-bridge controllers lt3804 secondary-side dual output controller with opto driver regulates two secondary outputs; optocoupler feedback driver and second output synchronous driver controller ltc3901 secondary-side synchronous driver for push-pull and drives n-channel synchronous mosfets, programmable timeout, full bridge converters reverse current limit lt4430 secondary-side optocoupler driver overshoot control on start-up and short-circuit recovery, 600mv reference, thinsot? package ltc4440 high speed high voltage high side gate driver 80v operation, 100v tolerant, 1.5 ? pull-down, 2.4a pull-up polyphase is a registered trademark of linear technology corporation. thinsot is a trademark of linear technology corporation. typical applicatio u LTC3723-1 100w, 36v in to 72v in to 3.3v/30a isolated forward converter 1 v b 5 4 6 a a 10v v in 15 ltc3723egn-1 drvb cs comp sdrb v cc uvlo 9 150k 1 0.47 f 1 f drva dprg v ref v ref sprg gnd ss fb c t c t 220pf 68nf t2 t1 23.4mm 20.1mm 9.4mm planar 6.04k 27.4k 813 l3 1mh 68 f 20v ? ? 10 8 18 5 4 16 10k 33k 150 ? 1/4w 66.5k rleb 820 ? 12 7 14 560 ? 100pf 383k 30k sync timer ltc3900es8 6 7 1nf 0.47 f 25v 372312 ta06 v out v out v in Cv out fg gnd v cc 5 562 ? 845 ? 26.1k cs + v b v x v x v out cs C 12 cg 34 l1 0.33 h 10v bas21 bas21 3 5 2 4 ?? 1 6 ? + si7450dp 1 f 100v 2 v in v in Cv in 2.2nf 630v 1 f 100v 6 2 220pf 2.2nf 250v 11 5 1 2 6 moc207 2 4 gnd 3 oc opto fb lt4430es6 v in 1.00k 15 ? 1/4w 0.03 ? 1w 120k 820 ? 120pf 4.7nf 5 86 efficiency (%) 87 89 91 88 90 92 93 94 10 15 20 load current (a) 25 30 48v in si7336adp 2 Cv out Cv out v out si7336adp 2 7 8 470 f 6.3v + l2 0.85 h v ref v ref v ref c t ? 10 11 ? b0540w b0540w 8.66k mmbt2369 50k 1 f, 100v tdk c3225x7r2a105m (1210) 100 f, 6.3v tdk c3225x5r0j107m (1210) 2.2nf, 630v tdk c3216jb2j222k 470 f, 6.3v sanyo 6tpd470m d1: mmbz5240b l1: coilcraft do1813p-331hc l2: pulse pa1292.910 l3: coilcraft do1608c-105 t1: pulse pa810.007 (7:6:6:1:1:1t) t2: pulse pa0184 (1:1t) d1 10v 5 comp 330 ? 4.7nf 47nf 470pf 1k 10nf 330 ? 2.2nf 100 f 6.3v 2 5.1 ? 1/2w 2.2nf 5.1 ? 1/2w

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